Renesas Shines at ISSCC with Cutting-Edge ADAS SoCs
Renesas Electronics recently showcased new processor technologies at the International Solid-State Circuits Conference, designed specifically for automotive System-on-Chips (SoCs) used in advanced driver assistance systems (ADAS) and autonomous driving. These innovations aim to enhance performance, improve power efficiency, and maintain high levels of functional safety.
Key highlights from the event included:
1. A convolutional neural network (CNN) hardware accelerator core that delivers deep learning performance of 60.4 tera operations per second (Tops) and power efficiency of 13.8 Tops/W.
2. Safety mechanisms for rapid detection and response to random hardware failures, providing an efficient and effective failure detection system.
3. A mechanism allowing software tasks with varying safety levels to run concurrently on the SoC without interfering with each other, ensuring enhanced functional safety for Asil D control.
These advancements are integrated into Renesas’ latest automotive SoC, the R-Car V3U.
ADAS and autonomous driving demand deep learning capabilities of 60 to 120 Tops and efficient power usage. Most of the processing load stems from activities like object recognition and issuing control commands. Achieving the stringent Asil D safety standards defined by ISO 26262 is crucial in these applications.
As the number of sensors in these systems grows, there’s a need for more robust CNN processing and reduced heat output to facilitate air-cooled electronic control units (ECUs), offering weight and cost benefits. Renesas’ CNN hardware accelerator core, featuring three high-density blocks, meets these demands with 6 MB of dedicated memory, reducing data fetches from external memory by over 90%. This yields 60.4 Tops of performance with 13.8 Tops/W efficiency.
ISO 26262 sets high functional safety targets, especially for Asil D, requiring 99% single point fault metric (SPFM) and 90% latent fault metric (LFM) detection. It’s essential for automotive SoCs to meet these criteria due to their critical operational roles in vehicles.
Renesas has engineered safety features for efficient and reliable detection of random hardware failures across the SoC. These features, integrated into the V3U, aim to meet Asil D metrics, enabling the SoC to perform self-diagnosis and simplify the design of fault-tolerant autonomous systems.
Ensuring “Freedom from Interference” (FFI) between software tasks is also vital for upholding functional safety standards. Preventing lower-safety-level tasks from impacting higher-level ones, especially during hardware module and shared memory access, is crucial. Renesas has developed mechanisms that monitor and block unauthorized data access, ensuring FFI for all tasks on the SoC.
